NDK 日本電波工業株式会社

 

title

What is differential output?

■Differential output use two different output signals from XO that are exactly opposite in phase to each other.

Advantage

■ Better noise resistance for wired data communication.
■ Provides low amplitude from XO to customer circuit.
   (Double amplitude is available at customer circuit)

Major application

Applications that use differential output XO
For high frequency data communication
Major protocol is PCI Express
PCI Express
One of data communication standard, especially used for high grade graphic board.
PCI Express is used for PC,
currently also used for automotive high speed data transmission

Output level and waveform

  CMOS LVPECL LVDS HCSL
Output
waveform
  
VOH Min. 0.9VCC
(Min. 2.97V)
VCC-1.025 to VCC-0.88
(2.275 to 2.42V)
Max. 1.6V 0.66 to 0.85V
VOL Max. 0.1VCC
(Max. 0.33V)
VCC-1.81 to VCC-1.62
(1.49 to 1.68V)
Min. 0.9V -0.15 to 0.15V
Current
Consumption
Typ. 10.5mA
(F0=120MHz)
Typ. 45.5mA
(F0=125MHz)
Typ. 24.0mA
(F0=100MHz)
Typ. 32.5mA
(F0=100MHz)
Test
Circuit
Application   Base-station, SONET/SDH
Ethernet
Router, Tranceiver
Optical terminator
CCD Camera(Automotive),
FPGA,Ethernet
Sattelite-based ground communication equipment
PC,GPS-Navigation(PCIe)
Amusement(PCIe)
Camera , Ethernet

* At +3.3V supply voltage.

Products Line up (3.2 x 2.5mm)

Conforms to AEC-Q200Conforms to PCI Express 3.0 (NP3225SC)
Model Freq. Range Output Supply
Voltage
Current
Consumption
Phase Jitter (mA)
(12k to 20MHz)
at 156.25MHz
Product
detail
NP3225SA 100 to 175MHz LVPECL +2.5V or +3.3V Max. 60mA Typ.90fs PDFPDF
NP3225SB 100 to 175MHz LVDS +2.5V or +3.3V Max. 40mA Typ.100fs PDFPDF
NP3225SC 100 to 175MHz HCSL +2.5V or +3.3V Max. 50mA Typ.85fs PDFPDF

Phase Noise / Jitter

Phase Noise : typ.
Phasenoise_NP3225SB(LVDS)  PhaseNoise_NP3225SA(PECL)

Jitter : typ. (12kHz to 20MHz)
Phase Jitter

Contact Us

For more information on the products, please contact:

ndkpr-m@ndk.com