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Differential Output Crystal Oscillators for 156.25 MHz and 312.5 MHz Utilizing Photolithography Technology to Support Next-Generation Optical Communication from 800G to 1.6T

(1) Introduction

With the transaction to 6G, mobile communication speeds are expected to reach several hundred Gbps--ten times faster than 5G. The number of simultaneous device connections is also projected to increase tenfold, reaching tens of millions per square kilometer. This dramatic growth will further accelerate data traffic.

While the evolution of previous generations like 4G and 5G was primarily driven by mobile phones and smartphones, 6G is poised to shift focus toward artificial intelligence (AI), which is now emerging as a key application area with immense growth potential. Driven by rising demand for AI, traffic within data centers is surging.

As a result, infrastructure equipment is evolving to support ultra-high-speed communications, and the optical transceivers at the core of this infrastructure are trending toward speeds beyond 800G, moving toward 1.6T and even 3.2T.

To ensure the quality of these high-speed communications, our company offers high-precision fundamental-mode crystal oscillator designs enabled by photolithography-based precision processing technology. This allows us to deliver high-quality standard clock signals essential for next-generation optical communication.

(2) Technical Background

In optical communication, the Intensity Modulation-Direct Detection (IM-DD) system enables high-speed transmission by increasing the bandwidth per symbol through higher baud rates and multi-level amplitude modulation. In 400G/800G communication, the transition from NRZ to PAM4 reduces the signal amplitude to one-third (assuming the same full swing), which increases sensitivity to noise and results in a more stringent signal-to-noise ratio (SNR) requirement.

Moreover, in the Digital Coherent system, information is transmitted on both the phase and amplitude of the X and Y polarizations, making the signal-to-noise ratio (SNR) a critical parameter. Currently, the industry has adopted 16QAM for optical transceivers above 400G to achieve higher transmission speeds.

To meet the demands of high-speed data processing, reference clocks (crystal oscillators) that are compact, support high-temperature operation, offer high-frequency, and exhibit low phase jitter are required.


(3) Market Trends in Optical Communication

3.1 Advancements in Communication Speed

High-speed data communication is achieved through a combination of higher baud rates, an increased number of bits per symbol, and the use of more lanes for parallel transmission.


Advancements in Communication Speed


3.2 Multi-level Modulation

3.2.1 Intensity Modulation-Direct Detection:IM-DD system

A system that increases the number of bits per symbol by using multi-level amplitude modulation based on optical intensity. In the case of PAM4, compared to NRZ, the signal amplitude is reduced to one-third when the full swing remains the same, resulting in lower SNR under a constant noise condition.


IM-DD system

*This image is for illustration purposes only.


3.2.2 Digital Coherent system

A system that modulates both phase and amplitude across dual polarizations (X and Y) to transmit information. As modulation levels increase (i.e., multi-level modulation), the spacing between symbols becomes narrower, resulting in lower SNR even under constant noise conditions.


Digital Coherent system


3.2.3 Tolerance of Sampling UI

When maintaining a constant UIrms-to-UI tolerance ratio, the actual value of UIrms decreases relatively as the baud rate increases. This means that jitter requirements for the reference clock become more stringent -- for example, doubling the baud rate results in jitter tolerance being halved.


Tolerance of Sampling UI


3.2.4 Phase noise mask

Phase Noise Specification. When the baud rate doubles and shifts to a higher frequency, the phase noise mask specification becomes more stringent, by -6 dB according to 20Log(N). As a result, the phase noise requirements for the reference clock also become more stringent.

Phase noise mask


(4) Intensity Modulation-Direct Detection:IM-DD system

In WDM systems, wavelength dispersion causes temporal broadening, which leads to waveform distortion. Since the receiver does not detect phase information, this results in errors when reading signal intensity. The effects of wavelength dispersion become more significant with longer transmission distances and higher baud rates. Multi-level modulation schemes require low-jitter reference clocks. It is crucial to design a buffer in the received power budget during the process of designing the transmission system. In the case of WDM systems, the degradation caused by wavelength dispersion must also be included in the power budget.

Recommended IM-DD Block Diagram


(5) Digital Coherent system

The digital coherent system is less affected by wavelength dispersion because digital signal processors (DSPs) can compensate for it and recover the original waveform. When the modulation scheme shifts from QPSK (2 bits per symbol) to 16QAM (4 bits per symbol), the symbol spacing becomes narrower, making the system more sensitive to phase noise. As a result, the signal-to-noise ratio (SNR) decreases even under stable phase noise conditions. Thus, multi-level modulation schemes require low-jitter reference clocks. In long-distance and multi-span transmission systems, the use of optical amplifiers introduces cumulative amplified spontaneous emission noise, which degrades the SNR. It is crucial to design a noise budget to ensure sufficient OSNR at the receiver during transmission system design.

Digital Coherent system-1

Digital Coherent system-2


Recommended Digital Coherent Block Diagram


(6) New release product

We have developed a differential-output crystal oscillator in compact size (2.0×1.6×0.66mm and 2.5×2.0×0.74mm) that achieve world-class performance in terms of high fundamental frequency, high precision, and low jitter even at elevated temperatures up to 105℃. We have achieved this through developing high-frequency crystal units utilizing photolithography technology, and compact ICs and packages that compensate for the temperature-dependent frequency variation of the crystal, while maintaining low phase jitter.


6.1 Phase jitter (Phase noise)

Phase jitter is evaluated by integrating the phase noise over the offset frequency range from 12 kHz to 20 MHz. Lower phase noise results in better jitter performance. This shows a comparison of phase noise characteristics between MEMS oscillators and crystal oscillators.

Phase jitter (Phase noise)-1


Phase jitter (Phase noise)-2


As can be seen from the results, MEMS oscillators do not achieve phase jitter performance as good as that of crystal oscillators. In high-speed communication systems, phase jitter performance is critical; therefore, crystal oscillators are recommended.

The reason MEMS oscillators typically have poorer phase jitter performance is because they are fundamentally based on PLL (Phase-Locked Loop) circuits. While PLL-based oscillators allow for flexible output frequency configuration and can easily generate high frequencies based on the reference clock, they tend to have worse phase noise characteristics. The basic structure of a PLL (Phase-Locked Loop) consists of a VCO (Voltage-Controlled Oscillator), a programmable frequency divider, a phase detector, a loop filter (often including a charge pump), a low-pass filter (LPF), and a reference clock. In PLL, the VCO typically exhibits poor phase noise performance. To suppress the VCO's phase noise, the cutoff frequency of the LPF is set relatively high.
However, below this cutoff frequency, the LPF is not effective in attenuating noise. As a result, the phase noise of the reference clock remains and, moreover, is multiplied by the PLL's frequency multiplication factor N, leading to a degradation of phase noise by a factor of N. In addition, noise from other PLL components such as the phase detector and charge pump further contribute to the overall phase noise.

Phase jitter (Phase noise)-3


On the other hand, our oscillator does not use a PLL circuit and achieves low jitter through an optimal circuit design that outputs high-frequency signals using fundamental-mode oscillation. However, in order to do this, it is technically challenging to design the resonator itself to oscillate at the desired output frequency. To manufacture resonators that operate in the fundamental mode at frequencies over 100 MHz, photolithography technology is essential. For high-frequency resonators, the thickness of the crystal unit becomes extremely thin, and this has been difficult to achieve with conventional processing techniques. Furthermore, high-purity quartz crystals have high Q-values, which help suppress noise. Our company has a long track record and manufacturing know-how in quartz crystal growth, and we possess technology for growing high-Q quartz ingots. These technologies enable us to deliver high-frequency signals exceeding 100 MHz with excellent low-jitter characteristics.


Phase jitter (Phase noise)-4


6.2 Power Consumption

Crystal oscillators can reduce power consumption by approximately 30% compared to MEMS oscillators.

Power Consumption


In terms of power consumption, this is one of the reasons why crystal oscillators are recommended. MEMS oscillators consume a large amount of power in circuits such as PLLs. It is a significant challenge to suppress power consumption in the data center market, which consumes a large amount of electricity for handling massive data processing. In the trend to minimize power consumption, the adoption of low-power components is one of the selection criteria, and this is one of the reasons why crystal oscillators are preferred.

6.3 Module Size

We developed oscillators in the world's smallest class, measuring 2.0mm x 1.6mm. With the introduction of these crystal oscillators, we are expanding our lineup of standard-sized differential output oscillators to meet the demand for miniaturization. Optical transmission modules are trending towards smaller sizes as data transmission speeds increase. While the size of the module is limited, the mounted boards do not have sufficient area due to the increasing number of components. The selection of small-sized surface-mount components greatly contributes to PCB layout design.

Module Size


(7) Conclusion

We contribute to the advancement of optical transmission infrastructure through our crystal devices that achieve compact size, high frequency, and low noise.


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